1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device.
2. Description of the Related Art
There is a conventionally known technology that conducts flip-chip connection of a semiconductor chip and an interposer substrate such as a BGA substrate with solder bumps which are formed on the semiconductor chip.
The solder bumps are formed of Pb based solder such as Sn—Pb but now being formed of Pb-free solder such as Sn—Ag in view of an influence of lead on the environments in these years.
Where Sn—Ag solder is used to form the solder bumps, a plating method is used. For example, the solder bumps are formed by forming a conducting layer on a passivation film, supplying the conducting layer with an electric current, supplying a binary plating solution of Sn and Ag to form the Sn—Ag solder on the conducting layer, and then reflowing the Sn—Ag solder.
But, it is hard to accurately control the composition of the Sn—Ag solder because it is difficult to control the binary plating solution. Therefore, a technology that forms to stack an Ag film and an Sn film with a unitary plating solution and reflows to form Sn—Ag solder bumps is being watched with interest.
But, according to the above technology, the side surface of the Ag film is possibly etched with a chemical solution or the like and damaged when the conducting layer is removed after the Ag film and the Sn film are formed. As a result, the solder bumps do not have a desired composition, and there is a possibility that a melting point is varied and mechanical strength is degraded.